Integrated circuit design decisions are often driven by semiconductor device scalability and semiconductor device density. For example, size scaling of single-gate planar field effect transistors (FETs) resulted in devices with smaller channel lengths. The smaller channel lengths, however, resulted in a corresponding increase in short channel effects and a decrease in drive current. In response, different types of non-planar multi-gate field effect transistors (MUGFETs), such as dual-gate non-planar FETs (also referred to herein as fin-type FETs (FINFETs)) and tri-gate non-planar FETs, that have one or more semiconductor fins were developed in order to provide reduced-size field effect transistors, while simultaneously avoiding corresponding increases in short channel effects and decreases in drive current. Various semiconductor structures incorporate multiple instances of non-planar MUGFETs having different type conductivities. For example, static random access memory (SRAM) cells are known that incorporate six non-planar MUGFETs: two N-type pass-gate transistors, two N-type pull-down transistors and two P-type pull-up transistors. While the use of non-planar MUGFETs, as opposed to planar FETs, has reduced the surface area of a chip consumed by such structures, further increasing device density is desirable.